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Cache coherence – survey

About the author

profssional comp scientist
Level
General public
Study
computer...
School/University
Copenhagen

About the document

Published date
Language
documents in English
Format
Word
Type
case study
Pages
5 pages
Level
General public
Accessed
0 times
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Committee Oboolo.com
  1. Introduction
  2. Cache Coherence Problem - An Analysis
  3. Cache Coherence Protocol
  4. Conclusion

Many multiprocessor chips and computer systems today have hardware that supports shared-memory. This is because shared-memory multicore chips are considered a cost-effective way of providing increased and improved computing speed and power since they utilize economically interconnected low-cost microprocessors. Shared-memory multiprocessors utilize cache to reduce memory access latency and significantly reduce bandwidth needs for the global interconnect and local memory module. However, a problem still exists in these systems: cache coherence problem introduced by local caching of data, which leads to reduced processor execution speeds. The problem of cache coherence in hardware is reduced in today's microprocessors through the implementation of various cache coherence protocols. This article reviews literature on cache coherence with particular attention to cache coherence problem, and the protocols-both hardware and software that have been proposed to solve it. Most importantly, it identifies a specific problem associated with cache coherence and proposes a novel solution.

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